ISO-690 (author-date, English)

KONDOTH, Lashmi, SHANKARAN, Rajan, SHENG, Quan Z. und KUANTAMA, Endrowednes, 2025. Hybrid Interconnect and Intermediate Memory-Based 2.5 D No C Architecture for High Performance Computing Applications. In: . 15 Dezember 2025.

Elsevier - Harvard (with titles)

Kondoth, L., Shankaran, R., Sheng, Q.Z., Kuantama, E., 2025. Hybrid Interconnect and Intermediate Memory-Based 2.5 D No C Architecture for High Performance Computing Applications, in: . https://doi.org/10.1109/MCSo C67473.2025.00030

American Psychological Association 7th edition

Kondoth, L., Shankaran, R., Sheng, Q. Z., & Kuantama, E. (2025, Dezember 15). Hybrid Interconnect and Intermediate Memory-Based 2.5 D No C Architecture for High Performance Computing Applications. https://doi.org/10.1109/MCSo C67473.2025.00030

Springer - Basic (author-date)

Kondoth L, Shankaran R, Sheng QZ, Kuantama E (2025) Hybrid Interconnect and Intermediate Memory-Based 2.5 D No C Architecture for High Performance Computing Applications

Juristische Zitierweise (Stüber) (Deutsch)

Kondoth, Lashmi/ Shankaran, Rajan/ Sheng, Quan Z./ Kuantama, Endrowednes, Hybrid Interconnect and Intermediate Memory-Based 2.5 D No C Architecture for High Performance Computing Applications, 2025, .

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