ISO-690 (author-date, English)

CALABRESE, A., QUER, S. und SQUILLERO, G., 2025. Flying-Probe Testing: A Trajectory Planner and a Benchmark Suite. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. 1 Dezember 2025. Vol. 44, no. 12, p. 4807-4817. DOI 10.1109/TCAD.2025.3567012.

Elsevier - Harvard (with titles)

Calabrese, A., Quer, S., Squillero, G., 2025. Flying-Probe Testing: A Trajectory Planner and a Benchmark Suite. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. 44, 4807-4817. https://doi.org/10.1109/TCAD.2025.3567012

American Psychological Association 7th edition

Calabrese, A., Quer, S., & Squillero, G. (2025). Flying-Probe Testing: A Trajectory Planner and a Benchmark Suite. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions On, IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst., 44(12), 4807-4817. https://doi.org/10.1109/TCAD.2025.3567012

Springer - Basic (author-date)

Calabrese A, Quer S, Squillero G (2025) Flying-Probe Testing: A Trajectory Planner and a Benchmark Suite. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. 44:4807-4817. https://doi.org/10.1109/TCAD.2025.3567012

Juristische Zitierweise (Stüber) (Deutsch)

Calabrese, A./ Quer, S./ Squillero, G., Flying-Probe Testing: A Trajectory Planner and a Benchmark Suite, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. 2025, 4807-4817.

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