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1

Hybrid SORN Cross-Correlation Architecture for Low-Complexity FPGAs
Rust, J. ; Barthel, M. ; Hulsmeier, N. ; et al.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems IEEE Trans. VLSI Syst. Very Large Scale Integration (VLSI) Systems, IEEE Transactions on. 33(11):2940-2951 Nov, 2025

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2

Design of compressor-based multipliers using simulated annealing for arithmetic logic unit.
Pavitra, Y. J. ; Manikandan, J.
Neural Computing & Applications. Nov2025, Vol. 37 Issue 33, p27747-27757. 11p.

SIMULATED annealing COMPUTER arithmetic ELECTRONIC circuit desig... MATHEMATICAL optimizatio... TECHNICAL specifications FIELD programmable gate...
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3

MSDF-Based MAC for Energy-Efficient Neural Networks
Moradi Cherati, S. ; Barzegar, M. ; Sousa, L.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems IEEE Trans. VLSI Syst. Very Large Scale Integration (VLSI) Systems, IEEE Transactions on. 33(9):2370-2381 Sep, 2025

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4

Efficient Multi-Cycle Folded Integer Multipliers
Houraniah, Ahmad ; Ugurdag, H. Fatih ; Dedeagac, C. Emre
2025 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) VLSI (ISVLSI), 2025 IEEE Computer Society Annual Symposium on. 1:1-6 Jul, 2025

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5

Sorn-Based Cross-Correlation for Scg Signal Peak Detection in Resource-Constrained Systems
Rahman, Kazi Mohammad Abidur ; Kulau, Ulf ; Rust, Jochen
2025 14th International Conference on Modern Circuits and Systems Technologies (MOCAST) Modern Circuits and Systems Technologies (MOCAST), 2025 14th International Conference on. :1-4 Jun, 2025

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6

A Formal Evaluation of the Design Space for SORN Arithmetic Datatypes
Barthel, Moritz ; Yao, Yixuan ; Hulsmeier, Nils ; et al.
2025 14th International Conference on Modern Circuits and Systems Technologies (MOCAST) Modern Circuits and Systems Technologies (MOCAST), 2025 14th International Conference on. :1-4 Jun, 2025

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7

Early Termination of the MSDF Computations towards Efficient Inference in Neural Networks
Cherati, Sahar Moradi ; Barzegar, Mohsen ; Sousa, Leonel
2025 IEEE International Symposium on Circuits and Systems (ISCAS) Circuits and Systems (ISCAS), 2025 IEEE International Symposium on. :1-5 May, 2025

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8

Efficient Floating-Point Divider based on Hybrid Cubic-Quadratic Goldschmidt Algorithm
Dai, Liangtao ; Zhu, Haocheng ; Wang, Yuan ; et al.
2025 IEEE International Symposium on Circuits and Systems (ISCAS) Circuits and Systems (ISCAS), 2025 IEEE International Symposium on. :1-5 May, 2025

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9

Rigorous Error Analysis for Logarithmic Number Systems
Nguyen, Thanh Son ; Solovyev, Alexey ; Arnold, Mark G. ; et al.
2025 IEEE 32nd Symposium on Computer Arithmetic (ARITH) ARITH Computer Arithmetic (ARITH), 2025 IEEE 32nd Symposium on. :125-132 May, 2025

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10

An Empirical Study of Microscaling Formats for Low-Precision LLM Training
Yang, Hanmei ; Deng, Summer ; Nagpal, Amit ; et al.
2025 IEEE 32nd Symposium on Computer Arithmetic (ARITH) ARITH Computer Arithmetic (ARITH), 2025 IEEE 32nd Symposium on. :1-8 May, 2025

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11

Hardware Fixed-Point 2D and 3D norms
Bouarah, Romain ; De Dinechin, Florent
2025 IEEE 32nd Symposium on Computer Arithmetic (ARITH) ARITH Computer Arithmetic (ARITH), 2025 IEEE 32nd Symposium on. :29-36 May, 2025

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12

On Stochastic Rounding with Few Random Bits
Fitzgibbon, Andrew ; Felix, Stephen
2025 IEEE 32nd Symposium on Computer Arithmetic (ARITH) ARITH Computer Arithmetic (ARITH), 2025 IEEE 32nd Symposium on. :133-140 May, 2025

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13

Design of a Robust IEEE Compliant Floating - Point Divide and Square Root Using Iterative Approximation
Sager, Carson ; Stine, James E.
2025 IEEE 16th Latin America Symposium on Circuits and Systems (LASCAS) Circuits and Systems (LASCAS), 2025 IEEE 16th Latin America Symposium on. 1:1-5 Feb, 2025

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14

Improved Modular Multiplication Algorithms Using Solely IEEE 754 Binary Floating-Point Operations
Sugizaki, Y. ; Takahashi, D.
IEEE Transactions on Emerging Topics in Computing IEEE Trans. Emerg. Topics Comput. Emerging Topics in Computing, IEEE Transactions on. 13(3):1259-1271 Sep, 2025

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15

Logical Reverse Inference Realized by Combined Bits with Backhopping‐Like Current‐Induced Magnetization Switching.
Ren, Ruizhi ; Cao, Yi ; Zuo, Minggao ; et al.
Advanced Functional Materials. 10/22/2025, Vol. 35 Issue 43, p1-8. 8p.

COMPUTER arithmetic DATA security CMOS logic circuits COMPUTER logic DATA recovery
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16

Constraint-Aware E-Graph Rewriting for Hardware Performance Optimization
Coward, S. ; Drane, T. ; Constantinides, G.A.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on. 44(4):1366-1379 Apr, 2025

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17

Design and Performance Analysis of an 8-3 Approximate Compressor-Based Multiplier for Image Blending Application.
Gupta, Sanjiv Kumar ; Dhawan, Amit ; Tiwari, Manish ; et al.
IETE Journal of Research. Jul2025, Vol. 71 Issue 7, p2441-2452. 12p.

COMPUTER arithmetic IMAGE fusion APPROXIMATION algorithms COMPUTER performance
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18

Quantitative Evaluation on the Limits of SORN Arithmetic Hardware Circuits
Barthel, Moritz ; Hulsmeier, Nils ; Rust, Jochen ; et al.
2024 IEEE Nordic Circuits and Systems Conference (NorCAS) Nordic Circuits and Systems Conference (NorCAS), 2024 IEEE. :1-5 Oct, 2024

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19

Modular Arithmetic Based on Boolean Functions: A Divide and Conquer Approach
Gorodecky, D. ; Sousa, L.
IEEE Access Access, IEEE. 13:186383-186396 2025

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20

ROVER: RTL Optimization via Verified E-Graph Rewriting
Coward, S. ; Drane, T. ; Constantinides, G.A.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on. 43(12):4687-4700 Dec, 2024

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