LI, Han, WEI, Jiangbo, MIAO, Yuan, AN, Weize, WU, Xudong, YU, Huan und WANG, Chao, 2025. A Package-on-Package Module with Integrated FPGA Minimum System for 48-Channel Synchronous Sampling 16-bit ADC. In: . 17 Oktober 2025.
Elsevier - Harvard (with titles)Li, H., Wei, J., Miao, Y., An, W., Wu, X., Yu, H., Wang, C., 2025. A Package-on-Package Module with Integrated FPGA Minimum System for 48-Channel Synchronous Sampling 16-bit ADC, in: . https://doi.org/10.1109/ICICM66614.2025.11315926
American Psychological Association 7th editionLi, H., Wei, J., Miao, Y., An, W., Wu, X., Yu, H., & Wang, C. (2025, Oktober 17). A Package-on-Package Module with Integrated FPGA Minimum System for 48-Channel Synchronous Sampling 16-bit ADC. https://doi.org/10.1109/ICICM66614.2025.11315926
Springer - Basic (author-date)Li H, Wei J, Miao Y, An W, Wu X, Yu H, Wang C (2025) A Package-on-Package Module with Integrated FPGA Minimum System for 48-Channel Synchronous Sampling 16-bit ADC
Juristische Zitierweise (Stüber) (Deutsch)Li, Han/ Wei, Jiangbo/ Miao, Yuan/ An, Weize/ Wu, Xudong/ Yu, Huan/ Wang, Chao, A Package-on-Package Module with Integrated FPGA Minimum System for 48-Channel Synchronous Sampling 16-bit ADC, 2025, .