SUH, J., CHOI, H., JUNG, Y., OH, S., CHO, H., KOO, N., KIM, S.J., BAE, C., HA, S. und JE, M., 2023. A 16-Channel Impedance-Readout IC With Synchronous Sampling and Baseline Cancelation for Fast Neural Electrical Impedance Tomography. IEEE Solid-State Circuits Letters, Solid-State Circuits Letters, IEEE, IEEE Solid-State Circuits Lett. 1 Januar 2023. Vol. 6, , p. 109-112. DOI 10.1109/LSSC.2023.3265678.
Elsevier - Harvard (with titles)Suh, J., Choi, H., Jung, Y., Oh, S., Cho, H., Koo, N., Kim, S., Bae, C., Ha, S., Je, M., 2023. A 16-Channel Impedance-Readout IC With Synchronous Sampling and Baseline Cancelation for Fast Neural Electrical Impedance Tomography. IEEE Solid-State Circuits Letters, Solid-State Circuits Letters, IEEE, IEEE Solid-State Circuits Lett. 6, 109-112. https://doi.org/10.1109/LSSC.2023.3265678
American Psychological Association 7th editionSuh, J., Choi, H., Jung, Y., Oh, S., Cho, H., Koo, N., Kim, S., Bae, C., Ha, S., & Je, M. (2023). A 16-Channel Impedance-Readout IC With Synchronous Sampling and Baseline Cancelation for Fast Neural Electrical Impedance Tomography. IEEE Solid-State Circuits Letters, Solid-State Circuits Letters, IEEE, IEEE Solid-State Circuits Lett., 6, 109-112. https://doi.org/10.1109/LSSC.2023.3265678
Springer - Basic (author-date)Suh J, Choi H, Jung Y, Oh S, Cho H, Koo N, Kim S, Bae C, Ha S, Je M (2023) A 16-Channel Impedance-Readout IC With Synchronous Sampling and Baseline Cancelation for Fast Neural Electrical Impedance Tomography. IEEE Solid-State Circuits Letters, Solid-State Circuits Letters, IEEE, IEEE Solid-State Circuits Lett. 6:109-112. https://doi.org/10.1109/LSSC.2023.3265678
Juristische Zitierweise (Stüber) (Deutsch)Suh, J./ Choi, H./ Jung, Y./ Oh, S./ Cho, H./ Koo, N./ Kim, S.J./ Bae, C./ Ha, S./ Je, M., A 16-Channel Impedance-Readout IC With Synchronous Sampling and Baseline Cancelation for Fast Neural Electrical Impedance Tomography, IEEE Solid-State Circuits Letters, Solid-State Circuits Letters, IEEE, IEEE Solid-State Circuits Lett. 2023, 109-112.