Treffer: Compiler Techniques for Reducing Data Cache Miss Rate on a Multithreaded Architecture

Title:
Compiler Techniques for Reducing Data Cache Miss Rate on a Multithreaded Architecture
High performance embedded architectures and compilers: HiPEAC 2008
Authors:
Sarkar, S., Tullsen, D.M.
Source:
LECTURE NOTES IN COMPUTER SCIENCE. (4917):353-368
Availability:
http://explore.bl.uk/primo_library/libweb/action/display.do?tabs=detailsTab&gathStatTab=true&ct=display&fn=search&doc=ETOCCN067515376&indx=1&recIds=ETOCCN067515376
Database:
British Library Document Supply Centre Inside Serials & Conference Proceedings