• Validation of Hardware Impleme...

Treffer: Validation of Hardware Implementations using Formal Description Techniques

Title:
Validation of Hardware Implementations using Formal Description Techniques
Applied formal methods in system design
Authors:
Huecas, G., Robles, T., Gonzalez, L. M., Serrano, J.
Source:
INTERNATIONAL WORKSHOP ON APPLIED FORMAL METHODS IN SYSTEM DESIGN. :115-132
Availability:
http://explore.bl.uk/primo_library/libweb/action/display.do?tabs=detailsTab&gathStatTab=true&ct=display&fn=search&doc=ETOCCN026343693&indx=1&recIds=ETOCCN026343693
Database:
British Library Document Supply Centre Inside Serials & Conference Proceedings