Treffer: Combining asynchronous task parallelism and Intel SGX for secure deep learning: (Practical experience report)

Title:
Combining asynchronous task parallelism and Intel SGX for secure deep learning: (Practical experience report)
Contributors:
Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors, Barcelona Supercomputing Center, Universitat Politècnica de Catalunya. PM - Programming Models
Publisher Information:
Institute of Electrical and Electronics Engineers (IEEE)
Publication Year:
2024
Collection:
Universitat Politècnica de Catalunya, BarcelonaTech: UPCommons - Global access to UPC knowledge
Document Type:
Konferenz conference object
File Description:
6 p.; application/pdf
Language:
English
DOI:
10.1109/EDCC61798.2024.00029
Rights:
Open Access
Accession Number:
edsbas.FD77EA03
Database:
BASE

Weitere Informationen

A common way of improving performance of applications for multi-core processors is to exploit parallelism. In deep learning (DL), training or tuning parameters use user’s sensitive data, and thus preserving privacy is critical. Hardware-assisted protection mechanisms (i.e., trusted execution environments - TEEs) offer a practical privacy-preserving solution, nowadays available both in private and public data centers. We present SGX-OmpSs, a new approach combining a task-based programming model (i.e., OmpSs) with TEEs (i.e., Intel Software Guard Extensions). SGX-OmpSs supports asynchronous task parallelism and hardware heterogeneity by using the data dependencies between tasks of the application, easily specified by code annotations. We evaluate SGX-OmpSs via several microbenchmarks and state-of-the-art DL applications and datasets (e.g., YOLO and MNIST). SGX-OmpSs achieves 94% gain speedup while offering additional security guarantees. ; Peer Reviewed ; Postprint (author's final draft)