• Describing and verifying FFT c...

Treffer: Describing and verifying FFT circuits using SharpHDL

Title:
Describing and verifying FFT circuits using SharpHDL
Authors:
Pace, Gordon J., Vella, Christine, 3rd Computer Science Annual Workshop (CSAW’05)
Publisher Information:
University of Malta. Faculty of ICT
Publication Year:
2005
Collection:
University of Malta: OAR@UM / L-Università ta' Malta
Subject Terms:
Computer hardware description languages, Fourier transformations -- Computer programs, Object-oriented methods (Computer science), Computer programs -- Verification
Document Type:
Konferenz conference object
Language:
English
Relation:
https://www.um.edu.mt/library/oar//handle/123456789/22459
Availability:
https://www.um.edu.mt/library/oar//handle/123456789/22459
Rights:
info:eu-repo/semantics/openAccess ; The copyright of this work belongs to the author(s)/publisher. The rights of this work are as defined by the appropriate Copyright Legislation or as modified by any successive legislation. Users may access this work and can make use of the information contained in accordance with the Copyright Legislation provided that the author must be properly acknowledged. Further distribution or reproduction in any format is prohibited without the prior permission of the copyright holder.
Accession Number:
edsbas.4198B493
Database:
BASE

Weitere Informationen

Fourier transforms are critical in a variety of fields but in the past, they were rarely used in applications because of the big processing power required. However, the Cooley’s and Tukey’s development of the Fast Fourier Transform (FFT) vastly simplified this. A large number of FFT algorithms have been developed, amongst which are the radix-2 and the radix-22 . These are the ones that have been mostly used for practical applications due to their simple structure with constant butterfly geometry. Most of the research to date for the implementation and benchmarking of FFT algorithms have been performed using general purpose processors, Digital Signal Processors (DSPs) and dedicated FFT processor ICs but as FPGAs have developed they have become a viable solution for computing FFTs. In this paper, SharpHDL, an object oriented HDL, will be used to implement the two mentioned FFT algorithms and test their equivalence. ; peer-reviewed