WANG, Xinshuo, LIU, Lei und LI, Yifei, 2025. High-Throughput and Memory-Efficient Pipeline Key–Value Store Architecture on FPGA. Micromachines. 1 Dezember 2025. Vol. 16, no. 12, p. 1398-1417. DOI 10.3390/mi16121398.
Elsevier - Harvard (with titles)Wang, X., Liu, L., Li, Y., 2025. High-Throughput and Memory-Efficient Pipeline Key–Value Store Architecture on FPGA. Micromachines 16, 1398-1417. https://doi.org/10.3390/mi16121398
American Psychological Association 7th editionWang, X., Liu, L., & Li, Y. (2025). High-Throughput and Memory-Efficient Pipeline Key–Value Store Architecture on FPGA. Micromachines, 16(12), 1398-1417. https://doi.org/10.3390/mi16121398
Springer - Basic (author-date)Wang X, Liu L, Li Y (2025) High-Throughput and Memory-Efficient Pipeline Key–Value Store Architecture on FPGA.. Micromachines 16:1398-1417. https://doi.org/10.3390/mi16121398
Juristische Zitierweise (Stüber) (Deutsch)Wang, Xinshuo/ Liu, Lei/ Li, Yifei, High-Throughput and Memory-Efficient Pipeline Key–Value Store Architecture on FPGA., Micromachines 2025, 1398-1417.