HSIEH, Pin-Chieh, FANG, Tzu-Lun, JIN, Shaobo, WANG, Yuyan, FUNABIKI, Nobuo und FAN, Yu-Cheng, 2025. A Verilog Programming Learning Assistant System Focused on Basic Verilog with a Guided Learning Method. Future Internet. 1 August 2025. Vol. 17, no. 8, p. 333-366. DOI 10.3390/fi17080333.
Elsevier - Harvard (with titles)Hsieh, P.-C., Fang, T.-L., Jin, S., Wang, Y., Funabiki, N., Fan, Y.-C., 2025. A Verilog Programming Learning Assistant System Focused on Basic Verilog with a Guided Learning Method. Future Internet 17, 333-366. https://doi.org/10.3390/fi17080333
American Psychological Association 7th editionHsieh, P.-C., Fang, T.-L., Jin, S., Wang, Y., Funabiki, N., & Fan, Y.-C. (2025). A Verilog Programming Learning Assistant System Focused on Basic Verilog with a Guided Learning Method. Future Internet, 17(8), 333-366. https://doi.org/10.3390/fi17080333
Springer - Basic (author-date)Hsieh P-C, Fang T-L, Jin S, Wang Y, Funabiki N, Fan Y-C (2025) A Verilog Programming Learning Assistant System Focused on Basic Verilog with a Guided Learning Method.. Future Internet 17:333-366. https://doi.org/10.3390/fi17080333
Juristische Zitierweise (Stüber) (Deutsch)Hsieh, Pin-Chieh/ Fang, Tzu-Lun/ Jin, Shaobo/ Wang, Yuyan/ Funabiki, Nobuo/ Fan, Yu-Cheng, A Verilog Programming Learning Assistant System Focused on Basic Verilog with a Guided Learning Method., Future Internet 2025, 333-366.