DAMSCHEN, Marvin, BAUER, Lars und HENKEL, Jorg, 2017. Timing Analysis of Tasks on Runtime Reconfigurable Processors. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 1 Januar 2017. Vol. 25, no. 1, p. 294-307. DOI 10.1109/TVLSI.2016.2572304.
Elsevier - Harvard (with titles)Damschen, M., Bauer, L., Henkel, J., 2017. Timing Analysis of Tasks on Runtime Reconfigurable Processors. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25, 294-307. https://doi.org/10.1109/TVLSI.2016.2572304
American Psychological Association 7th editionDamschen, M., Bauer, L., & Henkel, J. (2017). Timing Analysis of Tasks on Runtime Reconfigurable Processors. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 25(1), 294-307. https://doi.org/10.1109/TVLSI.2016.2572304
Springer - Basic (author-date)Damschen M, Bauer L, Henkel J (2017) Timing Analysis of Tasks on Runtime Reconfigurable Processors.. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25:294-307. https://doi.org/10.1109/TVLSI.2016.2572304
Juristische Zitierweise (Stüber) (Deutsch)Damschen, Marvin/ Bauer, Lars/ Henkel, Jorg, Timing Analysis of Tasks on Runtime Reconfigurable Processors., IEEE Transactions on Very Large Scale Integration (VLSI) Systems 2017, 294-307.