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Towards Source-Level Timing Analysis of Embedded Software Using Functional Verification Methods
Müller-Gritschneder, Daniel (Prof. Dr.) ; Chakraborty, Samarjit (Prof. Dr.) ; Caccamo, Marco (Prof. Dr.) ; et al.
Towards Source-Level Timing Analysis of Embedded Software Using Functional Verification Methods
Chakraborty, Samarjit (Prof. Dr.) ; Chakraborty, Samarjit (Prof. Dr.);Caccamo, Marco (Prof. Dr.);Müller-Gritschneder, Daniel (Prof. Dr.) ; Becker, Martin ; et al.
Towards Source-Level Timing Analysis of Embedded Software Using Functional Verification Methods ; Quellcode-basierte Zeitanalyse eingebetteter Software mit Hilfe funktionaler Verifikationsmethoden
Becker, Martin ; Chakraborty, Samarjit (Prof. Dr.) ; Caccamo, Marco (Prof. Dr.) ; et al.
FEDERAL REGISTER.
Federal Register (National Archives & Records Service, Office of the Federal Register). 12/29/2025, Vol. 90 Issue 245, pI-iv. 497p.
FEDERAL REGISTER.
Federal Register (National Archives & Records Service, Office of the Federal Register). 9/30/2025, Vol. 90 Issue 187, pI-iv. 498p.
A Relational Program Logic with Data Abstraction and Dynamic Framing.
BANERJEE, ANINDYA ; NAGASAMUDRAM, RAMANA ; NAUMANN, DAVID ; et al.
ACM Transactions on Programming Languages & Systems. Dec2022, Vol. 44 Issue 4, p1-135. 135p.
Timing Analysis of Safety-Critical Automotive Software: The AUTOSAFE Tool Flow.
Becker, Martin ; Mohamed, Sajid ; Albers, Karsten ; et al.
2015 Asia-Pacific Software Engineering Conference (APSEC); 2015, p385-392, 8p
A Verified Optimizer for Quantum Circuits.
HIETALA, KESHA ; RAND, ROBERT ; LIYI LI ; et al.
ACM Transactions on Programming Languages & Systems. Sep2023, Vol. 45 Issue 3, p1-35. 35p.
Timing Analysis of Tasks on Runtime Reconfigurable Processors.
Damschen, Marvin ; Bauer, Lars ; Henkel, Jorg
IEEE Transactions on Very Large Scale Integration (VLSI) Systems; Jan2017, Vol. 25 Issue 1, p294-307, 14p
Ubiquitous Verification of Ubiquitous Systems.
Wilhelm, Reinhard ; Maffei, Matteo
Software Technologies for Embedded & Ubiquitous Systems (9783642162558); 2011, p47-58, 12p
FEDERAL REGISTER.
Federal Register (National Archives & Records Service, Office of the Federal Register). 7/16/2025, Vol. 90 Issue 134, pI-iv. 1419p.
FEDERAL REGISTER.
Federal Register (National Archives & Records Service, Office of the Federal Register). 7/15/2025, Vol. 90 Issue 133, pI-iv. 278p.
FEDERAL REGISTER.
Federal Register (National Archives & Records Service, Office of the Federal Register). 7/1/2025, Vol. 90 Issue 124, pI-28867. 908p.
FEDERAL REGISTER.
Federal Register (National Archives & Records Service, Office of the Federal Register). 5/16/2025, Vol. 90 Issue 94, pI-iii. 471p.
A Lightweight Formalism for Reference Lifetimes and Borrowing in Rust.
PEARCE, DAVID J.
ACM Transactions on Programming Languages & Systems. Apr2021, Vol. 43 Issue 1, p1-73. 73p.
Native Simulation of MPSoC Using Hardware-Assisted Virtualization.
Shen, Hao ; Hamayun, Mian-Muhammad ; Petrot, Frédéric
IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems; Jul2012, Vol. 31 Issue 7, p1074-1087, 14p
FEDERAL REGISTER.
Federal Register (National Archives & Records Service, Office of the Federal Register). 5/14/2024, Vol. 89 Issue 94, pI-iii. 456p.
Single Source Design Environment for Embedded Systems Based on SystemC.
H. Posadas ; F. Herrera ; V. FernÁndez ; et al.
Design Automation for Embedded Systems; Dec2004, Vol. 9 Issue 4, p293-312, 20p
FEDERAL REGISTER.
Federal Register (National Archives & Records Service, Office of the Federal Register). 12/11/2024, Vol. 89 Issue 238, pI-iii. 607p.
Verifying constant-time implementations by abstract interpretation.
Blazy, Sandrine ; Pichardie, David ; Trieu, Alix
Journal of Computer Security. 2019, Vol. 27 Issue 1, p137-163. 27p.
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